To provide an LSI design system capable of preventing antenna damage occurring in internal MOS transistors due to that wiring formed during manufacturing processes of LSIs or like becomes an antenna.

Layout data after installation of wirings is read by layout reading processing A1 and an up-sizing candidate table is created by sizing candidate table creating processing A2 using various libraries so that candidate values are arranged for every function cell in ascending order of gate areas. By antenna error net detecting processing A3, a net having wiring layers causing an antenna error is detected. A gate pin, its instance, type of a cell connected to the net is recognized by gate pin/cell recognizing processing A4 and a cell preventing an antenna error is up-sized by cell sizing processing A5 by referring to a gate area from an up-sizing candidate table.

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