PURPOSE: To prevent an output signal for the normal working from affecting other logic circuit devices which are performing no scan action by providing an output inhibiting gate to invalidate all output signals for the normal working during a scan action.

CONSTITUTION: When a scan action is instructed by the scan control signal supplied from a scan control signal input terminal 1, a scan-in signal is supplied from a scan-in signal input terminal 2. A memory element 3 sends the memory data to another element 3 set at the stage after a scan bus and at the same time stores the input data. The memory data on all elements 3 are successively outputted from a scan-out signal output terminal 4. In this case, an output inhibiting gate 5 is validated by the scan control signal supplied from the terminal 1 during a scan action. Thus the output signal supplied from a signal output terminal 6 for the normal working is invalidated. In such a way, other logic circuit devices having no scan action are never affected.