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Patent Searching and Data


Title:
LSI LOGICAL CIRCUIT
Document Type and Number:
Japanese Patent JPS6072317
Kind Code:
A
Abstract:

PURPOSE: To inspect numerous signal lines through a small number of inspection terminals, by decoding a selected control signal from a decorder circuit and selecting one signal in accordance with the decoded output by means of a selector, and then, connecting the selected signal to a gate circuit.

CONSTITUTION: When a prescribed input signal is impressed upon input terminals D1, D2∼DN of a decoder circuit B, a signal decoded by the circuit B is introduced to a selector circuit A and the circuit A selects one inspection signal line corresponding to the decoded signal out of inspection signal lines S1, S2∼SA and introduces the signal to a gate circuit C. In case where a logic signal is led from an inspection signal terminal T to one inspection signal line thus selected, the input terminal K of a changeover controlling signal is set to the input mode and, where the logic signal of an inspection signal line is outputted from the terminal T, the terminal K is set to the output mode. In this case, a small number of LSI terminals are sufficient even when the number of signals lines to be inspected is 2n and, moreover, it is not necessary to add any unnecessary floating capacities for performing the inspection.


Inventors:
TAKAYAMA JIYUN
Application Number:
JP17960383A
Publication Date:
April 24, 1985
Filing Date:
September 28, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H03K19/00; H03K19/173; (IPC1-7): H03K19/00
Attorney, Agent or Firm:
Uchihara Shin