To conduct luminance/chrominance signal separation and noise reduction by using a memory in common.

A composite video input signal supplied to an input terminal 1 is fed to adders 3, 4 through a (1-K) multiple weighting circuit 2. Furthermore, a memory 6 stores a signal from the weighting circuit 2 through a selector 5 and gives e.g. a preceding frame signal to the adder 3 through an inverter circuit 7 and also directly to the adder 4. Then signals from the adders 3, 4 are extracted respectively at output terminals 8, 9. Furthermore, an adder 12 sums signals from the adders 3, 4 respectively through K-multiple weighting circuits 10, 11 and gives its output to the memory 6 via the selector 5, whose switching is controlled by a motion detection signal supplied to a terminal 13. For example, a signal from the weighting circuit 2 is selected for a pixel from which a motion of the composite video input signal is detected.