Title:
MRAM装置
Document Type and Number:
Japanese Patent JP4630314
Kind Code:
B2
Abstract:
A write circuit (24) for a large array (10) of memory cells (12) of a Magnetic Random Access Memory ("MRAM") device (8) comprises a column driven (32) for each memory cell block, the column drivers (32) writing to different blocks at different times. The write circuit (24) provides a controllable, bi-directional write current to selected word and bit lines (14 and 16) without exceeding breakdown limits of the memory cells (12). Additionally, the write circuit (24) spreads out the write currents over time to reduce peak currents.
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| JPS63231787 | MAGNETIC BUBBLE MEMORY ELEMENT |
Inventors:
Frederick A. Parner
Kenneth J. Eldredge
Lang Tea Trang
Kenneth J. Eldredge
Lang Tea Trang
Application Number:
JP2007197428A
Publication Date:
February 09, 2011
Filing Date:
July 30, 2007
Export Citation:
Assignee:
SAMSUNG ELECTRONICS CO.,LTD.
International Classes:
G11C11/14; G11C11/15; G11C11/16; H01L21/8246; H01L27/10; H01L27/105; H01L43/08
Domestic Patent References:
| JP11353886A | ||||
| JP3030181A | ||||
| JP2002522864A | ||||
| JP6084347A | ||||
| JP5266651A | ||||
| JP2094097A | ||||
| JP10320985A | ||||
| JP2000082294A | ||||
| JP1125800A | ||||
| JP11176179A | ||||
| JP2001222882A |
Foreign References:
| WO2000008650A1 |
Attorney, Agent or Firm:
Mikio Hatta
Yasuo Nara
Katsuyuki Utani
Yasuo Nara
Katsuyuki Utani