Title:
MAIN STORAGE SHARING TYPE MULTIPROCESSOR
Document Type and Number:
Japanese Patent JP3849951
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To access local data fast by performing cache coherent control over other nodes when a 1st bit of a table corresponding to a page to be accessed is set and not performing the cache coherent control when not.
SOLUTION: Nodes 0 to 63 each assign one 1st bit for storing whether or not a page corresponding to each page in the main storage 160 of the node is accessed from another node, and resets the 1st bit when the system is initialized. The CPUs 110 to 112 of the nodes when accessing the main storages 160 of their nodes checks the 1st bits of tables corresponding to pages to be accessed by a table RAT 138 and then performs the cache coherent control over other nodes when the 1st bits are set, but do not perform the cache coherent control when not.
Inventors:
Tarui Toshiaki
Koichi Okazawa
Yasuyuki Okada
Shonai Toru
Toshio Okouchi
Akashi Hideya
Koichi Okazawa
Yasuyuki Okada
Shonai Toru
Toshio Okouchi
Akashi Hideya
Application Number:
JP5991497A
Publication Date:
November 22, 2006
Filing Date:
February 27, 1997
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
G06F12/08; G06F15/177; G06F12/02; G06F15/17; (IPC1-7): G06F15/163
Domestic Patent References:
| JP1109464A | ||||
| JP6274461A | ||||
| JP7210520A | ||||
| JP7160581A | ||||
| JP8016469A | ||||
| JP8016470A |
Attorney, Agent or Firm:
Osamu Ito