Title:
低漏洩電流の裏面照射フォトダイオードの製造
Document Type and Number:
Japanese Patent JP2004507881
Kind Code:
A
Abstract:
Ultra-low leakage current backside-illuminated semiconductor photodiode arrays are fabricated using a method of formation of a transparent, conducting bias electrode layer that avoids high-temperature processing of the substrate after the wafer has been gettered. As a consequence, the component of the reverse-bias leakage current associated with strain, crystallographic defects or impurities introduced during elevated temperature processing subsequent to gettering can be kept extremely low. An optically transparent, conductive bias electrode layer, serving as both an optical window and an ohmic backside equipotential contact surface for the photodiodes, is fabricated by etching through the polysilicon gettering layer and a portion of the thickness of heavily-doped crystalline silicon layer formed within, and near the back of, the substrate during the gettering process.
Inventors:
Chao Shray
Carlson Lars S
Moret Alan
Sheridan john
Carlson Lars S
Moret Alan
Sheridan john
Application Number:
JP2001579372A
Publication Date:
March 11, 2004
Filing Date:
April 20, 2001
Export Citation:
Assignee:
DigiRad Corporation
International Classes:
B32B9/04; H01J40/14; H01L21/322; G01T1/24; H01L27/144; H01L27/146; H01L27/15; H01L31/00; H01L31/09; H01L31/10; (IPC1-7): H01L31/10; G01T1/24; H01L31/09
Attorney, Agent or Firm:
Sakio Oba
Shinji Kato
Shinji Kato