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Title:
MANUFACTURE OF COMPOUND SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59123271
Kind Code:
A
Abstract:

PURPOSE: To improve the reproducibility and contrive to reduce contact resistance by a method wherein ion implantation is performed prior to the process of alloying diffusion of an ohmic metal, so as to produce a large amount of lattice defect to the neighborhood of the position of the existence of an already formed channel.

CONSTITUTION: A recess 4A is formed at a gate electrode forming scheduled part. An Si dioxide (SiO2) film 5 is formed and patterned, and the part covering the recess 4A is left, then removing the other part. By adapting ion implantation method, an ion 6 an N type impurity is selectively implanted with the Si dioxide film 5 as a mask. After removing the Si dioxide film 5 used as the mask, a source electrode 8S and a drain electrode 8D are formed. For alloying, heat treatment is performed, and a gate electrode 9 is formed, thus completing the device. Thereby, the impurity is diffused uniformly and deeply, therefore an alloying contact of a low resistance and a high uniformity can be obtained with good reproducibility.


Inventors:
HIKOSAKA YASUMI
Application Number:
JP22970982A
Publication Date:
July 17, 1984
Filing Date:
December 28, 1982
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/812; H01L21/265; H01L21/28; H01L21/338; H01L29/778; H01L29/80; (IPC1-7): H01L21/265; H01L21/28
Domestic Patent References:
JPS57198661A1982-12-06
JPS57160171A1982-10-02
Attorney, Agent or Firm:
Shoji Kashiwaya (2 outside)



 
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