To provide a manufacturing method pertinent to the fine processing of ferroelectric layer, in relation to the manufacture of electronic circuit element containing ferroelectric thin film.

First, a lower part electrode layer 5 is deposited on the surface of a supporting substrate 1. Next, a ferroelectric layer 6 is deposited on the lower part electrode. Later, a high hardness mask layer 7 is deposited on the ferroelectric layer 6. Next, a resist pattern 8 covering a part of the layer 7 is formed on the layer 7. Next, the high hardness mask layer 7 is etched away using the resist pattern 8 as a mask to leave a high hardness pattern 7a on a part of the pattern 8. Next, the forroelectric layer 6 and the lower part electrode layer 5 are removed by ion-milling step using the pattern 7a as a mask. At this time, the ion-milling rate of the high hardness mask layer 7 is less than that of the resist pattern 8.