PURPOSE: To prevent the generation of stress-induced fine cracks by depositing a first dielectric thin film on a semiconductor substrate and arranging properly the crystal orientation of the thin film after the heat treatment and then depositing a second dielectric thin film thereon and arranging properly the crystal orientation in the similar fashion.

CONSTITUTION: After the formation of a LOCOS isolation area 11 on an n-type silicon substrate, a zirconate lead titanate-made buffer film 12' is deposited on the substrate by sputtering. After it is deposited, heat treatment is carried out at a temperature of about 700°C for 30 minutes in the lead-included atmosphere. Then, similarly by sputtering, there are deposited a zirconate lead titanate film 12 and a platinum film 13. Then, a gate insulation film 14, a buffer layer 14' and a gate electrode 15 are pattern-formed by photolithography and argon reverse sputtering. Then, a specified amount of phosphorous is implanted with a specified acceleration energy. After impurity layers 16 and 16' are formed by annealing at a temperature of about 900° for 30 minutes, an interlayer insulation film 17 and an electrode 18 are formed, thereby manufacturing field-effect transistors.