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Patent Searching and Data


Title:
MANUFACTURE OF FIELD-EFFECT SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH03283627
Kind Code:
A
Abstract:

PURPOSE: To reduce parasitic resistance by providing a low concentration impurity layer making contact at the side of the lower part of a T type gate electrode and forming source-drain electrode using the upper horizontal part of the T type electrode as a mask.

CONSTITUTION: A T type gate electrode is formed by forming an operation layer 3 in a semi-insulating GaAs substrate 1, and depositing a WSi layer 5 and a W layer 6 into thicknesses of 0.25μm and 0.2μm using a sputtering processes and further subjecting them to dry-etching. Thereafter, an ohmic electrode 8, and gate and source-drain electrodes are formed by forming an SiO2 film over a predetermined portion of the substrate 1, and growing a low concentration impurity layer by a MOCVD process and further evaporating AuGe metal. By manufacturing a MESFET in such a manner, distance between the gate and the source and between the gate and the drain can be reduced, and the need of provision of a side wall oxide layer is eliminated, hence, parasitic resistance can be reduced.


Inventors:
OTA HIDEAKI
Application Number:
JP8423490A
Publication Date:
December 13, 1991
Filing Date:
March 30, 1990
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L29/812; H01L21/338; H01L29/417; (IPC1-7): H01L21/338; H01L29/50; H01L29/812
Attorney, Agent or Firm:
Uchihara Shin