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Patent Searching and Data


Title:
MANUFACTURE OF INTEGRATED CIRCUIT SUBSTRATE
Document Type and Number:
Japanese Patent JPS5951552
Kind Code:
A
Abstract:

PURPOSE: To easily and accurately measure the size of substrate after baking by printing patterns with a predetermined interval at a part of the surface of unbaked substrate and then baking.

CONSTITUTION: A pattern 5' having a constant interval is printed by a tungsten paste, for instance, to the edge of unbaked substrate 11'. A baked substrate 11 where the tungsten pattern 5 is sintered is formed by baking such unbaked substrate 11'. This baked substate 11 is contracted from unbaked sbstrate 11. Since the pattern 5 is formed in the same line having a constant interval, fluctuation in size of integrated circuit substrate 21 can be easily one accurately detected by comparing this pattern 5 with a scale showing clear interval by placing it on the pattern. Accordingly, the integrated circuit substrate 21 can be easily sorted for each size specification.


Inventors:
OONO KENICHI
Application Number:
JP16187582A
Publication Date:
March 26, 1984
Filing Date:
September 17, 1982
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L23/12; H01L23/498; H05K1/02; H05K1/09; (IPC1-7): H01L23/12
Attorney, Agent or Firm:
Uchihara Shin