Title:
MANUFACTURE OF MESA IN SEMICONDUCTOR STRUCTURE
Document Type and Number:
Japanese Patent JPH02271680
Kind Code:
A
Abstract:
PURPOSE: To reduce nonuniformity on a surface and to provide a requested dimension, by producing a mesa through an oxidizing process to be executed in a cycle, and making the top of the mesa higher than its peripheral area in comparison with the last cycle. CONSTITUTION: An original structure or original substrate 103 is produced by depositing a photoresist film 102 on a desired mesa area 101A and next, and wet dioxide silicon etching is uniformly impressed onto the upside surface of the original substrate 103 until a non-protected dioxide silicon layer is removed. Then, a dioxide silicon layer 105 remains in a mesa area 106 and made practically higher than a peripheral non-mesa area 107. Further, a photoresist layer 102A is installed on the upside surface of the mesa area 106 again, dioxide silicon etching is repeated, afterwards, the mesa area 106 oxidized again is set at the desired height on the peripheral area 107, and a process for producing the mesa or pedestal structure is completed. Thus, the basic dimension can be provided while avoiding the problem of nonuniformity on the surface caused by silicon etching and oxide masking.
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Inventors:
JIEEMUSU ERU SUUINDARU
DANIERU EICHI GURANSAMU
DANIERU EICHI GURANSAMU
Application Number:
JP4916090A
Publication Date:
November 06, 1990
Filing Date:
February 28, 1990
Export Citation:
Assignee:
UNITED TECHNOLOGIES CORP
International Classes:
G01L9/00; H01L21/306; H01L21/308; H01L21/311; H01L21/316; H01L29/84; (IPC1-7): H01L21/306; H01L29/84
Attorney, Agent or Firm:
Fujiya Shiga (1 person outside)