PURPOSE: To provide a method for the manufacture of a MOS transistor of LDD structure wherein short channel effect is reduced.

CONSTITUTION: A silicon substrate 11 is subjected to dry etching using a gate electrode 16, a LDD spacer 17A and so on as a mask, to expose the sidewall surface 11A of the silicon substrate 11 positioned direct under the edge of the LDD spacer 17A. Oblique ion implantation (incidence angle: 60°) is performed to form a LDD implantation region 18, and then ordinary ion implantation is performed to make the depth of the LDD spacer 17A, where the source S and drain S are to be formed, smaller than the width of the LDD spacer 17A. This makes it possible to extend the edge of LDD to direct under the edge of the gate electrode after annealing, and thus enables the reduction of short channel effect.