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Title:
MANUFACTURE OF NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS63177569
Kind Code:
A
Abstract:

PURPOSE: To form uniform 2nd polycrystalline silicon film and eliminate the remnants of the 2nd polycrystalline silicon film by a method wherein side wall are formed on the edges of 1st polycrystalline silicon film and, after the 2nd polycrystalline silicon film is formed over the whole surface, a control gate and a word line are formed by anisotropic etching.

CONSTITUTION: A field oxide film 2 and a gate oxide film 3 are formed on a substrate 1 and 1st polycrystalline silicon film 4 is formed. Then a CVD oxide film 7 is formed over the whole surface so as to cover the 1st polycrystalline silicon film 4 and anisotropic etching is applied to the whole surface to form side wall films 6 whose top surfaces are inclined on the edges of the 1st polycrystalline silicon film 4. All the CVD oxide film 7 is removed by etching and a silicon oxide film 8 is formed on the upper surface of the polycrystalline silicon film 4. Then 2nd polycrystalline silicon film 9 which is to be a control gate and a word line is formed over the whole surface of the 1st polycrystalline silicon film 4 with the silicon oxide film 8 between and patterned to form the required control gate and word line.


Inventors:
OTANI YUKIHIRO
SAKAMURA SHOJI
Application Number:
JP959087A
Publication Date:
July 21, 1988
Filing Date:
January 19, 1987
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
H01L21/8247; H01L29/78; H01L29/788; H01L29/792; (IPC1-7): H01L29/78
Attorney, Agent or Firm:
Takuji Nishino



 
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