MANUFACTURE OF SEMICONDUCTOR DEVICE, SEMICONDUCTOR WAFER USED THEREIN AND MANUFACTURE THEREOF

Japanese Patent JP3580600

B2

PURPOSE: To discriminate between a front and a rear while keeping a symmetry of notch plane configuration by making a chamfered part formed in an inner circumferential edge part of one main surface and a chamfered part formed in an inner circumferential edge part of the other main surface in a notch formed in a circumference part differ from each other.
CONSTITUTION: A first notch chamfered part 11 is formed in an inner circumferential edge part of a first main surface 3 of a notch 10 and a second notch chamfered part 12 is formed in an inner circumferential edge part of a second main surface 4 of the notch 10. The first notch chamfered part 11 and the second notch chamfered part 12 are formed to show non-plane symmetry regarding a central surface in a thickness direction of the notch 10. It is possible to discriminate between the first main surface 3 and the second main surface 4 of a wafer 1 with a notch by discriminating between the first notch chamfered part 11 and the second notch chamfered part 12 in this way.

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Tomomi Sato
Norio Suzuki
Hirofumi Shimizu
Atsushi Koike
Maejima Hiroshi
Akira Kanai

JP16819095A

October 27, 2004

June 09, 1995

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Renesas Technology Corp.
Hitachi Super LSI Systems Co., Ltd.

B24B9/06; B24B49/12; H01L21/02; H01L21/304; H01L21/67; (IPC1-7): H01L21/02; H01L21/304; H01L21/68

JP2144908A
JP8172033A

Kajiwara Tatsuya

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