Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3191416
Kind Code:
B2
Abstract:
PURPOSE: To protect a gate insulation film from breakdown by forming an insulation film thinner than a gate insulation film on a semiconductor board on the bottom of an opening on a source diffusion layer and a drain diffusion layer for a MOS transistor.
CONSTITUTION: After a device isolation area 2 is installed to a P type silicon board 1, thermal oxidation is carried out so as to form a first insulation film whose thickness is less than 10nm or more particularly a 9nm thick oxide film. Then, patterning is carried out with a photoresist 4. For example, the oxide film 3 on predetermined source and drain areas is removed with hydrofluoric acid, thereby an aperture. Then, there is formed a thermal oxide film 5 (nitriding film) which serves as a second insulation film on this aperture portion. In this case, this thermal oxide film is thinner than that of the gate insulation film 3. For example, the thickness is specified to be around 1nm. This construction makes it possible to protect the gate insulation film 3 from breakdown.
Inventors:
Takashi Nakabayashi
Yoshiaki Kato
Mizuki Segawa
Hiroaki Nakaoka
Yoshiaki Kato
Mizuki Segawa
Hiroaki Nakaoka
Application Number:
JP17659392A
Publication Date:
July 23, 2001
Filing Date:
July 03, 1992
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H01L21/265; H01L21/28; H01L21/336; H01L29/423; H01L29/43; H01L29/49; H01L29/78; (IPC1-7): H01L29/78; H01L21/265; H01L21/28; H01L21/336; H01L29/43
Domestic Patent References:
| JP2109370A | ||||
| JP3142937A | ||||
| JP2295113A | ||||
| JP456276A |
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)