MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP3211767
PROBLEM TO BE SOLVED: To shorten the time for measuring the deviation amount in an X- direction (word line) and a Y-direction (bit line) and analyzing the measured result by using a box mark for automatic overlap measurement, at the forming of a capacity contact between the wiring of the grid shape structure of the word line and the bit line.
SOLUTION: In this manufacturing method, by overlapping two vertical lines formed of the word line 205 and two parallel lines formed of the bit line 211 and turning outer side box marks 205a and 211a for the automatic overlap measurement formed on a semiconductor substrate 201 into a grip shape, the deviation amount of a word line direction and the deviation amount of a bit line direction are simultaneously measured with a single box mark at the same time.
July 19, 2001
March 27, 1998
H01L21/027; H01L21/28; H01L21/3205; H01L21/8242; H01L23/544; H01L27/108; (IPC1-7): H01L21/027; H01L21/28; H01L21/3205; H01L21/8242; H01L27/108