PURPOSE: To extend ranges of a current value and current allowable value to be monitored at the time of setting a current Ipss between a source and a drain by connecting a semiconductor on a semiconductor wafer and a semiconductor device in parallel.

CONSTITUTION: When a source electrode 3, a drain electrode 4 and a gate electrode 9 of a predetermined length W are formed on an epitaxial layer 2 of a predetermined sectional shape on a GaAs substrate 1, a plurality of SUBFETs are connected in parallel to be formed, and ranges of a current amount, a current allowable value to be monitored at the time of setting the current lpss can be increased. Accordingly, an etching end time point of the epitaxial layer can be clearly decided at the time of regulating a current Ipss, and forming yield is enhanced.