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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPH05315561
Kind Code:
A
Abstract:

PURPOSE: To lessen a CMOS transistor of low/high voltage in number of manufacturing processes.

CONSTITUTION: After a gate electrode 6 of polysilicon is formed, a process where phosphorus ions are implanted into an N-channel transistor region 22 of high voltage and a P-channel transistor transistor region 21 of low voltage, a second process where boron ions are implanted into a P-channel transistor region 23 of high voltage and an N-channel transistor of low voltage, and a press-in process are provided, and the control of a transistor of low voltage in threshold voltage and the formation of an electrical field relaxation low concentration region of a transistor of high voltage are carried out through an ion implantation process and a press-in process.


Inventors:
TAMAGAWA AKIO
Application Number:
JP11945692A
Publication Date:
November 26, 1993
Filing Date:
May 13, 1992
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L27/092; H01L21/8238; H01L27/088; (IPC1-7): H01L27/092
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)