Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS5492180
Kind Code:
A
Abstract:
PURPOSE: To reduce gate-drain junction capacity by providing a gate layer to a buried bottom part and by sticking conductive poly-Si to a drain region by a CVD method, etc.
CONSTITUTION: On N--type epitaxial layer 2 on n-type Si substrate 1, SiO2 3 and Si3N4 4 are stacked and openings 5a and 5b are made. Film 4 is used as a mask to form thick oxidized films 6a and 6b. Films 6a and 6b are removed and the surface is covered newly with SiO2 7. Next, openings are made selectively, and injector layer 8 and gata layers 10a and 10b are formed through ion injection. Then, electrode N+-type poly-Si is formed at drain layer 12, so that the gate-drain junction capacity will become small with the gate and drain not overlapped together.
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Inventors:
IWAUCHI SHIGEKI
Application Number:
JP15928377A
Publication Date:
July 21, 1979
Filing Date:
December 29, 1977
Export Citation:
Assignee:
SEIKO INSTR & ELECTRONICS
International Classes:
H01L29/80; H01L21/28; H01L21/302; H01L21/331; H01L29/06; H01L29/417; H01L29/73; (IPC1-7): H01L21/28; H01L21/302; H01L29/06; H01L29/54; H01L29/80
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