Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS57118633
Kind Code:
A
Abstract:
PURPOSE:To prevent the generation of crystal defect and form a deeply diffused high density impurity region by a method wherein an impact against the high density impurity region is suppressed by a barrier layer. CONSTITUTION:A barrier layer is formed on the exposed surface of an N type or P type impurity region and a means to form a high density impurity layer without crystal defect through this barrier layer is provided. For instance, a barrier layer 3 of polycrystalline silicon is formed on the surface of an oxide film 2 and an aperture 2a for diffusion formed on the surface of a silicon substrate 1. Then shallow high density impurity diffusing source layer 5 is formed by diffusing phosphorus. After that thermal treatment in an oxidizing atmosphere is performed to form a deeply diffused high density impurity region 6. During this thermal treatment the barrier layer 3 is completely oxidized and transformed into insulating layer 7 of phosphoric silicate glass (PSG).
Inventors:
INOUE HIROSHI
Application Number:
JP433281A
Publication Date:
July 23, 1982
Filing Date:
January 14, 1981
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L21/225; (IPC1-7): H01L21/22
Domestic Patent References:
| JPS51113461A | 1976-10-06 | |||
| JPS52119857A | 1977-10-07 |
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