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Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6010655
Kind Code:
A
Abstract:

PURPOSE: To suppress crystal defect occurred in a silicon substrate due to the concentration of a stress at the edge of a groove or an electrode pattern by forming an angle formed between the edge to the (110) crystal azimuth of the substrate to 15° or larger.

CONSTITUTION: Grooves 21 are formed on a (100) silicon substrate, or an electrode pattern formed of at least one of polycrystalline silicon, tungsten, molybdenum formed through an insulating film of 30nm or smaller is formed. In this case, the angle of the edge of the groove 21 or the electrode pattern to the (110) crystal azimuth of the substrate is formed to 15° or larger. Thus, the production of the crystal defect corresponding to the pattern edge where the concentration of a stress feasibly occurs in the substrate can be suppressed.


Inventors:
KURE TOKUO
ISOMAE SEIICHI
MIZUTANI TATSUMI
Application Number:
JP11698083A
Publication Date:
January 19, 1985
Filing Date:
June 30, 1983
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H01L27/04; H01L21/306; H01L21/76; H01L21/822; H01L29/41; (IPC1-7): H01L27/04; H01L21/306; H01L21/76; H01L29/40
Attorney, Agent or Firm:
Junnosuke Nakamura



 
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