Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6072244
Kind Code:
A
Abstract:
PURPOSE:To obtain an element isolation layer of a small difference in dimensional conversion in a narrow element isolation region by a method wherein an Si substrate is selectively oxidized, and thereafter the surfaces of the substrate and an insulation film are flattened by being covered with the insulation film after etching-removal of a masking material. CONSTITUTION:An SiO2 film 2 and an Si3N4 film 3 are superposed on the (100) plane of the P<-> type Si substrate 1, a resist maks 4 being applied, and an oblique plane 5a of (111) and a flat bottom 5b of (100) being then formed by RIE with C2F6. The resist is removed, and a thermal oxide film 6, an Si3N4 film 7, and a CVDSiO2 8 are superposed; then an SiO2 8' is left by RIE under the condition that the etching rate of SiO2 is larger than that of Si3N4. After removal of the film 7 on the surface 5b with the film 8' as a mask, the film 8' and the film 6 on the surface 5b are removed and thermally oxidized, resulting in the formation of an oxide film 9 only in a wide groove. At the same time, a P type inversion preventing layer 10 is formed by activation of the previously implanted ions. When the remaining films 3 and 7 are removed, a CVDSiO2 11 and a photo resist 12 being superposed, and the substrate being then exposed by RIE from the flat surface under required condition; the surface of the element region and the oxide film 11 are flattented, and accordingly the narrow isolation layer 13 is formed
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Inventors:
SAWADA SHIZUO
HIGUCHI TAKAYOSHI
HIGUCHI TAKAYOSHI
Application Number:
JP17955683A
Publication Date:
April 24, 1985
Filing Date:
September 28, 1983
Export Citation:
Assignee:
TOSHIBA KK
International Classes:
H01L21/76; H01L21/762; (IPC1-7): H01L21/302
Attorney, Agent or Firm:
Takehiko Suzue