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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6130059
Kind Code:
A
Abstract:

PURPOSE: To shorten a product-manufacturing term, by a method in which each two of circuit substrates having active layers, insulating layers and metal bumps are combined with the bumps contacted respectively, and then the resulted combinations are stacked, in a case where the circuit substrates having different functions are stacked to make a multi-layer IC.

CONSTITUTION: An active layer 102 having an Al metal wiring is formed over a substrate 101 such as an insulator. An SiO2 film 103 is coated thereon and is bored with a required number of openings using photo etching. After metal bumps 104 contacting with the layer 102 are buried therein, insulating adhesive 105 such as polyimide resin is coated thereon thickly and is polished to expose the surfaces of the bumps 104. Thus a first circuit substrate 150 is provided which is buried with the adhesive 150 between the bumps 104 and has a planar surface. Next, a second circuit substrate 151 formed in the same way is combined with the first substrate 150 with the bumps 104 and 104' contacted, and the two substrates are heated to be integrated. Such integrated combinations are stacked by a desired number according to the request to make multi-functional.


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Inventors:
YASUMOTO MASAAKI
HAYAMA HIROSHI
ENOMOTO TADAYOSHI
Application Number:
JP15059884A
Publication Date:
February 12, 1986
Filing Date:
July 20, 1984
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L25/00; H01L21/18; H01L21/60; H01L21/68; H01L21/768; H01L21/822; H01L23/522; H01L27/00; (IPC1-7): H01L21/88; H01L25/04
Attorney, Agent or Firm:
Shin Uchihara