PURPOSE: To enable the improvement in the pattern accuracy and the enhancement of integration of a semiconductor device by using bromine gas as a reactive gas for performing the selective etching of a metal silicide layer and a polysilicon layer.
CONSTITUTION: A contact hole 12 arranged on a PSG layer 11 is filled with WSi2 16 and a polyside layer 19 composed of a polysilicon layer 17 and a TiSi2 layer 18 is formed on that. This resist is patterned and a wiring pattern 13 is formed by RIE using Br2 as a reactive gas. The etching rates of the TiSi2 layer 18 and polysilicon layer 17 are high and these are etched easily, whereas WSi2 16 is not etched as its etching rate is low. Accordingly, the RIE process prevents short-circuiting even if the wiring pattern 13 is slightly out of the contact hole 12.
KATO YOSHIKAZU
JPS5967635A | 1984-04-17 | |||
JPS59161874A | 1984-09-12 | |||
JPS56137635A | 1981-10-27 |