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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6235679
Kind Code:
A
Abstract:

PURPOSE: To reduce the parasitic capacitance of a gate electrode and obtain a semiconductor device of a high speed operation by a method wherein, after an insulation film and a cap layer are etched by using a resist film with eaves as a mask and a recessed part is formed in the cap layer, a gate metal layer is deposited by evaporation.

CONSTITUTION: An i-type GaAs layer 12, an n-type AlGaAs layer 13 and an n-type GaAs cap layer 14 are successively laminated on a semi-insulating substrate 11. An insulation layer 15 is formed on the cap layer 14 and further a resist film 16 is formed. After an aperture is made by photoetching of a predetermined region for a gate electrode, the insulation film 15 is etched to form a shape with eaves 17 suitable for lifting-off. Then the second insulation material is deposited as an insulation film 18 on the resist film and as an insulation film 19 on the cap layer. By utilizing the insulation film 18 and the resist film 16 as a mask, the insulation film 19 is etched and the cap layer 14 is etched by selective dry etching to form a recessed part 20. Then aluminum is evaporated as a gate metal layer 21 and the resist film 16 is removed by lifting-off to form a gate electrode 22.


Inventors:
HAIRI ISAMU
Application Number:
JP17619785A
Publication Date:
February 16, 1987
Filing Date:
August 09, 1985
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/812; H01L21/28; H01L21/283; H01L21/302; H01L21/3065; H01L21/338; H01L29/778; H01L29/80; (IPC1-7): H01L21/28; H01L21/302; H01L29/80
Attorney, Agent or Firm:
Sadaichi Igita