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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6461064
Kind Code:
A
Abstract:

PURPOSE: To suppress the influence of a short channel effect and to reduce a source resistance by forming first and second low concentration layers using the same mask by ion implantation from oblique direction and perpendicular direction of the surface of a semi-insulating substrate.

CONSTITUTION: A mask layer 3 and a mask layer 4 having a wider width than a gate length are formed on a GaAs substrate 1 having an active layer 2 on its surface. Then, impurity ions 5 are implanted from oblique direction to the surface of the substrate 1 to form the same conductivity type source, drain low concentration layers 6s, 6d as that of the layer 2. The layer 6s is formed to the section under the source of the layer 4 at this time. Then, impurity ions 7 are implanted perpendicularly to the surface of the substrate 1, and source, drain low concentration layers 8s, 8d having higher impurity concentration than those of the layers 6s, 6d are formed in the same conductivity type as that of the layer 2.


Inventors:
HARA YUJI
Application Number:
JP21940287A
Publication Date:
March 08, 1989
Filing Date:
September 01, 1987
Export Citation:
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Assignee:
NEC CORP
International Classes:
H01L21/265; H01L21/338; H01L29/80; H01L29/812; (IPC1-7): H01L21/265; H01L29/80
Attorney, Agent or Firm:
Uchihara Shin