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Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS6489470
Kind Code:
A
Abstract:

PURPOSE: To make it possible to process a silicide film with high accuracy by dry etching besides to prevent abnormal etching of an interface between this silicide film and an insulating film by forming a high melting point metal silicide film, an interlayer high melting point metal film and an insulating film in order on a foundation material layer followed by patterning three layer films on the foundation material layer by using a resist mask one layer at a time.

CONSTITUTION: A high melting point metal film 3, and an insulating film 4 such as a silicon oxide film or a silicon nitride film are in order formed on a high melting point metal silicide film 2 formed on a semiconductor substrate 1. Next, three layer films 2∼4 are patterned by etching having a photoresist film 5 as a mask for further to be given residue treatment. In this case, since the insulating film 4 is interposed between the high melting point silicide film 2 and the photoresist film 5, the high melting point metal silicide film 2 is not etched in a section wrapping type so as to be able to pattern the high melting point silicide film 2 on the semiconductor substrate 1 with high accuracy and excellently, thereby to check generation of cracks on the insulating film 11a on a gate electrode.


Inventors:
KONO YASUTAKA
Application Number:
JP24654787A
Publication Date:
April 03, 1989
Filing Date:
September 30, 1987
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H01L21/302; H01L21/28; H01L21/3065; H01L21/338; H01L29/47; H01L29/812; H01L29/872; (IPC1-7): H01L21/28; H01L21/302; H01L29/48; H01L29/80
Domestic Patent References:
JPS59181676A1984-10-16
JPS629677A1987-01-17
JPS6292481A1987-04-27
Attorney, Agent or Firm:
Kenichi Hayase