Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MANUFACTURE OF SEMICONDUCTOR ELEMENT
Document Type and Number:
Japanese Patent JPH0230135
Kind Code:
A
Abstract:

PURPOSE: To prevent the wiring of a semiconductor element from being disconnected or becoming high in resistance even when the aspect ratio of the contact hole is high by depositing a thick polysilicon layer on insulating films, with a contact hole formed into the insulating films being buried in the polysilicon layer, and then, depositing a high-melting point metal layer, etc., on the polysilicon layer by performing etching back to the entire surface of the polysilicon layer in an impurity diffused state.

CONSTITUTION: After insulating films 25 and 29 are formed on a semiconductor substrate 21 and a contact hole 31 is dug into the films 25 and 29, a thick polysilicon layer 32 is deposited on the films 25 and 29, with the contact hole 31 being buried in the layer 32. Then impurities are diffused into the polysilicon layer 32 on the insulating layers 25 and 29 and in the upper part of the contact hole 31 and the thickness of the polysilicon layer 32 is reduced to a prescribed thickness, with the hole 31 section being left thicker, by performing etch back to the polysilicon layer 32 into which the impurities are diffused over the entire surface. Thereafter, a high-melting point metal layer or high-melting point metal silicide layer 33 is deposited on the polysilicon layer and both of the layers 32 and 33 are patterned to a wiring pattern.


Inventors:
CHIN TSUGUMASA
WAKAMATSU HIDETOSHI
SAKAMOTO AKIHIRO
Application Number:
JP17918888A
Publication Date:
January 31, 1990
Filing Date:
July 20, 1988
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
OKI ELECTRIC IND CO LTD
International Classes:
H01L21/3205; H01L21/20; H01L21/768; (IPC1-7): H01L21/20; H01L21/3205; H01L21/88; H01L21/90
Attorney, Agent or Firm:
Hiroshi Kikuchi



 
Next Patent: JPH0230136