Title:
MANUFACTURE OF SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPH07161835
Kind Code:
A
Abstract:
PURPOSE: To minimize leakage current between memory elements by manufacturing a semiconductor storage device with a TFT, so that the process tolerance of bit line contact and capacitor contact is increased. CONSTITUTION: A bit line 3 for a storage element is formed on a semiconductor substrate l, and a contact hole 17 for the connection is formed. With polysilicon vapor-deposited, an activation region 5 of a thin-film transistor is formed by patterning. Further, a gate oxide film 6 and a gate electrode 7 are formed over it. A source region 5A is formed by implanting impurities into the activation region 5. After that, a fourth insulating film is vapor-deposited on the entire structure, and a spacer 9 is formed on the sidewall of a gate electrode 7 by anisotropic etching. After a fifth insulating film is vapor-deposited, a contact for electric charge storage is formed by etching, and over it, an electric charge storage electrode 11, a capacitor insulating film 12, a plate electrode 13 are successively formed. Thus, a leakage current at the connection surface of diffusion is also eliminated.
Inventors:
BOKU SEIUKU
Application Number:
JP15101794A
Publication Date:
June 23, 1995
Filing Date:
July 01, 1994
Export Citation:
Assignee:
GENDAI DENSHI SANGYO KK
International Classes:
H01L21/8247; H01L21/8242; H01L27/10; H01L27/108; H01L27/12; H01L29/78; H01L29/786; H01L29/788; H01L29/792; (IPC1-7): H01L21/8242; H01L27/108; H01L29/786; H01L21/8247; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Shukichi Nakagawa (1 person outside)
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