MANUFACTURE OF SEMICONDUCTOR WAFER - MITSUBISHI MATERIALS SHILICON CORP

Title:

MANUFACTURE OF SEMICONDUCTOR WAFER

Document Type and Number:

Japanese Patent JP09246216

Kind Code:

A

Abstract:

To reduce etching liquid quantity to be consumed, to improve the flatness of a semiconductor wafer produced, to reduce polishing quantity/ polishing time and to improve throughput.

A silicon ingot is sliced (S101). The silicon wafer is chamfered (S102). Both sides of the silicon wafer are simultaneously polished (S103). Lapping and the grinding of each side can be executed instead (S111 and S112). Polishing quantity is 10-40μm in total on both sides. In a CCR process, the chamfering face of the wafer is etched and a work skew and the like are removed (S104). A PCR work can be executed (S105). Mechanical-chemical polishing on both sides of the silicon wafer is executed (S106) and the polishing/ lapping work skews are removed. Then, a donor heat treatment and a getting treatment are executed (S107 and S108). Finishing mirror polishing and cleaning are executed (S109 and S110) and the wafer of high flatness is obtained.

Inventors:

Tanaka, Keiichi
Kuroda, Yukio
Asakawa, Keiichiro
Kagaya, Osamu

Application Number:

JP1996000079510

Publication Date:

September 19, 1997

Filing Date:

March 06, 1996

Export Citation:

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Assignee:

MITSUBISHI MATERIALS SHILICON CORP
MITSUBISHI MATERIALS CORP

International Classes:

H01L21/322; H01L21/304; H01L21/02; (IPC1-7): H01L21/304; H01L21/304; H01L21/322

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