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Patent Searching and Data


Title:
MANUFACTURE OF THIN FILM TRANSISTOR MATRIX
Document Type and Number:
Japanese Patent JPH03152514
Kind Code:
A
Abstract:
PURPOSE:To manufacture the thin film transistor(TFT) matrix of high quality at high yield by adhering an upper electrode film on an insulating substrate including a semiconductor film and then applying a voltage between a lower electrode and the upper electrode film. CONSTITUTION:On the insulating substrate 11, plural lower electrodes 12 are arrayed and formed in matrix and then a gate insulating film 13 and the semiconductor film 14 are adhered on the insulating substrate 11 including the lower electrodes 12. Then the upper electrode film 15 is adhered on the insulating substrate including the semiconductor film 14 and then the voltage V which is, for example, a 30V DC voltage is applied between the lower electrodes 12 and upper electrode film 15 to recover the insulation of the gate insulating film 13. Then the upper electrode film 15 is patterned into respective TFT electrodes and then the insulation defect of the gate insulating film between electrodes of a TFT is removed. Consequently, the TFT matrix is screened to improve the quality and yield.

Inventors:
INOUE ATSUSHI
NAGAHIRO NORIO
KAWAI SATORU
Application Number:
JP29189689A
Publication Date:
June 28, 1991
Filing Date:
November 08, 1989
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G02F1/136; G02F1/1368; H01L29/78; H01L29/786; (IPC1-7): G02F1/136; H01L29/784
Attorney, Agent or Firm:
Sadaichi Igita