MANUFACTURE OF WAFER FORMING SUBSTRATE AND SEMICONDUCTOR WAFER

Title:

MANUFACTURE OF WAFER FORMING SUBSTRATE AND SEMICONDUCTOR WAFER

Document Type and Number:

Japanese Patent JPH05259016

Kind Code:

A

Abstract:

PURPOSE: To easily obtain a semiconductor wafer, having a slackless cleavage plane as orientation flat surface, at a high yield rate.

CONSTITUTION: The edge face of a GaAs single crystal ingot 1, is cut, its outer circumference is polished, and a cylindrical GaAs single crystal ingot 2 is formed. On the part where orientation flat will be cleaved on the side face of the above-mentioned ingot 2, a V-shaped cut groove 7 is formed in the direction in parallel with the direction of cleavage, and a wafer forming substrate 8 is formed by slicing. After the substrate 8 has been processed into a mirror face state, an epitaxial layer 51 is formed, a cleavage is formed from the V-shaped groove in the final process, and an orientation flat 4a is formed.

Inventors:

Miyashita Soji
Norio Hayato
Yutaka Mitsuhashi

Application Number:

JP8941692A

Publication Date:

October 08, 1993

Filing Date:

March 12, 1992

Export Citation:

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Assignee:

Mitsubishi Electric Corporation

International Classes:

H01L21/02; B28D5/00; C30B33/00; H01L21/68; (IPC1-7): H01L21/02; H01L21/68

Attorney, Agent or Firm:

Kenichi Hayase

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