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Title:
MANUFACTURING METHOD OF INTEGRATED CIRCUIT BOARD INCLUDING FERROELECTRIC CAPACITOR
Document Type and Number:
Japanese Patent JP2013214560
Kind Code:
A
Abstract:

To provide a manufacturing method of an integrated circuit board including a ferroelectric capacitor.

A manufacturing method of an integrated circuit board 11 including a ferroelectric capacitor comprises: a first step of sequentially forming a first electrode layer 12, a ferroelectric thin film 23a and a second electrode 12c on a semiconductor substrate 21; a second step of forming take-out electrodes 11a-11d on a top face of the integrated circuit board 11; a third step of coating, for example, a bonding resin material 14 from above the take-out electrodes of the integrated circuit board 11; a fourth step of bonding the semiconductor substrate 21 upside down on the integrated circuit board 11 in an overlapping manner; a fifth step of removing only the semiconductor substrate 21 with the ferroelectric thin film 23a and electrodes 12c, d of the ferroelectric thin film 23a left on the integrated circuit board 11; a sixth step of patterning the first electrode layer 12 on the ferroelectric thin film 23a to form a first electrode 12d; and a seventh step of forming electrode connection parts 12a, b for connecting the electrode 12c on the ferroelectric thin film 23a with the take-out electrodes 11a, b on the integrated circuit board 11.


Inventors:
TANAKA HIDEJI
ESASHI MASAKI
Application Number:
JP2012082976A
Publication Date:
October 17, 2013
Filing Date:
March 30, 2012
Export Citation:
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Assignee:
UNIV TOHOKU
International Classes:
H01L21/822; H01G7/06; H01L27/04
Attorney, Agent or Firm:
Kazuyuki Hirayama