Title:
積層配線板の製造方法
Document Type and Number:
Japanese Patent JP7047750
Kind Code:
B2
Abstract:
Provided is a method of suppressing damage to a wiring layer that occurs when soldering a conductive wire or the like. To solve the problem, a method for manufacturing a laminated wiring board includes the following: a step (1) of preparing a resin sheet having a release layer and a resin composition layer provided on one side of the release layer; a step (2) of preparing the wiring board having a substrate and a wiring layer formed on a part of the surface of the substrate; a step (3) of laminating the resin sheet on the wiring board so that the wiring layer penetrates the resin composition layer to reach the release layer; and a step (4) of removing the peeling layer to expose a part of the wiring layer.
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Inventors:
Yousuke Nakamura
Ikumi Sawa
Ryo Miyamoto
Yoshio Nishimura
Ikumi Sawa
Ryo Miyamoto
Yoshio Nishimura
Application Number:
JP2018239845A
Publication Date:
April 05, 2022
Filing Date:
December 21, 2018
Export Citation:
Assignee:
AJINOMOTO CO.,LTD.
International Classes:
B32B37/14; B32B27/00; H05K3/46
Domestic Patent References:
| JP2005028734A | ||||
| JP5175639A | ||||
| JP2000332387A | ||||
| JP2002204050A |
Foreign References:
| WO2016088697A1 |
Attorney, Agent or Firm:
Sakai International Patent Office