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Title:
MANUFACTURING METHOD FOR MULTI-LAYER WIRING BOARD
Document Type and Number:
Japanese Patent JP2012060031
Kind Code:
A
Abstract:

To provide a manufacturing method for a multi-layer wiring board of high productivity which can manufacture metal wiring of high accuracy and high adhesion and can manufacture a multi-layer wiring board of excellent veer connection reliability for high yield.

A manufacturing method for a multi-layer wiring board comprises: (A) a process for forming an insulation layer on the surface of a wiring board comprising metal wiring; (B) a process for forming a veer hole; (C) a process for performing a desmear process; (D) a process for obtaining a laminated body by laminating on the insulation layer a laminated film for resin layer formation comprising a temporary support body, a function group which forms interaction with a plating catalyst or a precursor on the temporary support body, and a resin layer including a polymer containing a polymerizable group, so that the resin layer and the insulation layer which has the desmear process done contact each other; (E) a process for peeling the temporary support body from the laminated body; (F) a process for attaching the plating catalyst and the precursor on the wall of the veer hole and the resin layer to perform plating.


Inventors:
UEKI YUKITAKA
Application Number:
JP2010203582A
Publication Date:
March 22, 2012
Filing Date:
September 10, 2010
Export Citation:
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Assignee:
FUJIFILM CORP
International Classes:
H05K3/46; H05K3/18
Domestic Patent References:
JPH06148877A1994-05-27
JP2010157590A2010-07-15
JP2001308536A2001-11-02
JPH06148877A1994-05-27
JP2010157590A2010-07-15
JP2001308536A2001-11-02
Attorney, Agent or Firm:
Nozomi Watanabe
Haruko Sanwa
Hideaki Ito
Fumio Mitsuhashi