To provide a manufacturing method of a NAND flash memory device having an increased program threshold voltage obtained by increasing a contact area between a floating gate electrode and a control gate electrode and by decreasing a shift value of an interference threshold voltage of cells.

The manufacturing method includes a process of forming a trench by etching a tunnel oxide film, a first polysilicon film, a buffer oxide film, a nitride film which are laminated on the upper part of a semiconductor substrate and one part of the semiconductor substrate; a process of forming an insulating film in the trench to form an element isolation film 110; a process of successively removing the exposed nitride film and the exposed buffer oxide film; a process of forming a spacer 112 on the side surface of the element isolation film 110, and then, removing one part of the upper part of the element isolation film 110 to adjust EFH (effective field height) of the element isolation film; and a process of successively forming a dielectric film 114, a second polysilicon film 116 and a conductive film 118 on the upper part of an entire structure. With this configuration, the shift of an interference threshold voltage of cells is reduced to increase the program threshold voltage.