Title:
不揮発性半導体記憶装置の製造方法
Document Type and Number:
Japanese Patent JP4074054
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a highly reliable nonvolatile semiconductor storage device by preventing change in configuration of a contact hole thereby suppressing bad contact, and its manufacturing method. SOLUTION: A memory cell transistor, a selecting transistor, and a peripheral transistor are formed on a semiconductor substrate 10, and then BPSG films 23 and 39 are made all over the surface. Contact holes 27 and 29 extending to the impurity diffusion layer 18 of the selecting transistor and the polycrystalline silicon film 15 of a select gate shunt part are made in the BPSG films 23 and 39. Then, the occurrence of abnormality of the form of contact holes caused by the reflow of the BPSG films 23 and 39 occurring at heat treatment is prevented by stopping these contact holes 27 and 29 with polycrystalline silicon films.
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Inventors:
Hiroaki Tsunoda
Toru Hara
Toru Hara
Application Number:
JP2000297450A
Publication Date:
April 09, 2008
Filing Date:
September 28, 2000
Export Citation:
Assignee:
Toshiba Corporation
Chubu Toshiba Engineering Co., Ltd.
Chubu Toshiba Engineering Co., Ltd.
International Classes:
H01L21/8247; H01L21/768; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP10223867A | ||||
| JP2000183161A |
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai
Sadao Muramatsu
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai