Title:
SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2016178336
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method capable of improving a voltage withstanding property.SOLUTION: A manufacturing method of a JBS (Junction Barrier Schottky Diode) 1, comprises the steps of: preparing a substrate 10 which has an n-type region so as to include a principal surface 10A and which is composed of silicon carbide; forming a p-type region in the region including the principal surface 10A; heating the substrate 10 where the p-type region is formed at a temperature of 1250°C and over to form an oxide film 20 on the principal surface 10A across from the n-type region to the p-type region; removing the oxide film 20 so as to expose at least part of the principal surface 10A; and forming a Schottky electrode 50 which contacts the principal surface 10A exposed by removal of the oxide film 20.SELECTED DRAWING: Figure 7
Inventors:
WADA KEIJI
MASUDA TAKEYOSHI
MASUDA TAKEYOSHI
Application Number:
JP2016116315A
Publication Date:
October 06, 2016
Filing Date:
June 10, 2016
Export Citation:
Assignee:
SUMITOMO ELECTRIC INDUSTRIES
International Classes:
H01L21/329; H01L21/28; H01L29/06; H01L29/47; H01L29/861; H01L29/868; H01L29/872
Domestic Patent References:
| JP2010067937A | 2010-03-25 | |||
| JP2010050267A | 2010-03-04 | |||
| JP2009532902A | 2009-09-10 | |||
| JPWO2003047000A1 | 2005-04-14 |
Foreign References:
| WO2007086196A1 | 2007-08-02 |
Attorney, Agent or Firm:
Fukami patent office