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Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP7017035
Kind Code:
B2
Abstract:
To avoid coating failure of a resist solution.SOLUTION: A semiconductor device manufacturing method comprises: a metal layer formation step of forming a metal layer 18 on an interlayer insulation film 14 having a surface part including a top surface and a side face continuing from the top surface so as to coat the surface part of the interlayer insulation film 14; a polyimide layer formation step of forming a polyimide layer 24 which coats the metal layer 18; and a resist solution coating step of coating the polyimide 24 with a resist solution 26. The metal layer 18 has an inclined surface 18c which faces the side face 14s of the surface part 14a of the interlayer insulation film 14.SELECTED DRAWING: Figure 1D

Inventors:
Ryoji Matsui
Application Number:
JP2017145821A
Publication Date:
February 08, 2022
Filing Date:
July 27, 2017
Export Citation:
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Assignee:
株式会社デンソー
International Classes:
H01L21/3205; H01L21/3065; H01L21/768; H01L29/06; H01L29/41
Domestic Patent References:
JP2017118060A
JP2007335658A
JP2008021849A
Attorney, Agent or Firm:
Kaiyu International Patent Office