Title:
半導体装置の製造方法および半導体装置用の成形金型
Document Type and Number:
Japanese Patent JP6996153
Kind Code:
B2
Abstract:
To provide a method of manufacturing a semiconductor device and a molding die for the semiconductor device capable of attaining optimization in accordance with a shape of a semiconductor part.SOLUTION: A main body die 10 of this invention is configured of two die plates 1 and 2 including recess parts 11 and 15, a cull 12, a runner 13, and a gate 14 on die faces 1a and 2a. In the main body die 10, a cavity (a cavity formed by the recess parts 11 and 15 to be described later) is formed to allow an individual die 20 to be disposed therein. The individual die 20 is configured of two die plates 21 and 22 including a cavity 31, a runner 32, and a resin pool 33 on die faces 21a and 22a. The individual die 20 can be disposed in a free orientation inside a substantially rectangular parallelepiped cavity formed by the recess parts 11 and 15 of the die plates 1 and 2 of the main body die 10. A semiconductor module is mounted inside the recess part 11 of the die plate 1 on a fixed side of the main body die 10 via the individual die 20 such that a laminate substrate is positioned in a lower space inside the cavity 31 of the individual die 20.SELECTED DRAWING: Figure 5
Inventors:
Shinji Tada
Kuribayashi Hidenao
Yuki Inaba
Kuribayashi Hidenao
Yuki Inaba
Application Number:
JP2017152026A
Publication Date:
January 17, 2022
Filing Date:
August 04, 2017
Export Citation:
Assignee:
Fuji Electric Co., Ltd.
International Classes:
B29C45/26; B29C45/14; H01L21/56
Domestic Patent References:
| JP8072088A | ||||
| JP9246304A | ||||
| JP2004050557A | ||||
| JP5304180A | ||||
| JP5024325U |
Attorney, Agent or Firm:
Akinori Sakai