Title:
半導体装置の製造方法及び半導体装置
Document Type and Number:
Japanese Patent JP3780189
Kind Code:
B2
Abstract:
On a substrate, a first insulating film, a first interlayer insulating film, a second and third insulating films, and a second interlayer insulating film are formed. Wire trenches are formed reaching the upper surface of the third insulating film, and via holes are formed from the bottom of the wire trench to the upper surface of the first insulating film. Formation of the wire trench is performed by etching the second interlayer insulating film under a condition in which the second interlayer insulating film is selectively etched. The third insulating film exposed at the bottoms of the wire trenches and the first insulating film exposed at the bottoms of the via holes are removed by etching under a condition in which the third insulating film is selectively etched. Wires are filled in the via holes and the wire trenches.
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Inventors:
Shunichi Fukuyama
Yasushi Owada
Yuko Sakuma
Yasushi Owada
Yuko Sakuma
Application Number:
JP2001291013A
Publication Date:
May 31, 2006
Filing Date:
September 25, 2001
Export Citation:
Assignee:
富士通株式会社
International Classes:
H01L21/28; H01L21/768; H01L21/3205
Domestic Patent References:
| JP2003060030A |
Attorney, Agent or Firm:
Keishiro Takahashi
Mikio Kuruyama
Mikio Kuruyama