Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4457426
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device wherein a self-matching contact hole is stably opened with no deteriorated transistor characteristics. SOLUTION: In an active region of a semiconductor substrate, a conductive layer 32 and offset insulating film 23a are formed, while a side wall insulating film 24a on its side wall part, with an etching stopper film 25 formed on the entire surface. With the side wall insulating film and etching stopper film as masks, a conductive impurity D2 is introduced by allowing it to transmit the etching stopper film on the upper layer of the substrate, to form a source/drain diffusion layer 12. Then, an interlayer insulating film is formed at the upper layer of the etching stopper film, and a contact hole for exposing the etching stopper film is opened by such etching as the interlayer insulating film is selectively removed from the etching stopper film, before the etching stopper film at the bottom of the contact hole is removed. Then, an upper wiring such as a plug is formed in the contact hole.
Inventors:
Naoki Nagashima
Application Number:
JP6991799A
Publication Date:
April 28, 2010
Filing Date:
March 16, 1999
Export Citation:
Assignee:
ソニー株式会社
International Classes:
H01L21/302; H01L21/8234; H01L21/28; H01L21/3065; H01L21/336; H01L21/76; H01L21/768; H01L21/8242; H01L27/088; H01L27/108; H01L29/78
Domestic Patent References:
| JP11017129A | ||||
| JP10070191A | ||||
| JP11026716A | ||||
| JP11204641A |
Attorney, Agent or Firm:
Takahisa Sato