Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP4660259
Kind Code:
B2
Abstract:
The invention provides a package type semiconductor device and a manufacturing method thereof where reliability is improved without increasing a manufacturing cost. A resin layer (12) and/or a supporting member (13) are formed on a top surface of a semiconductor substrate (10) formed with pad electrodes (11). Then, openings (15) are formed penetrating the resin layer (12) and/or the supporting member (13) so as to expose the pad electrodes (11). Metal layers (16) are then formed on the pad electrodes (11) exposed in the openings (15), and conductive terminals (17) are formed thereon. Finally, the semiconductor substrate (10) is separated into semiconductor dice by dicing. When this semiconductor device is mounted on a circuit board, the conductive terminals (17) of the semiconductor die and external electrodes of the circuit board are electrically connected with each other.
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Inventors:
Takashi Noma
Application Number:
JP2005117857A
Publication Date:
March 30, 2011
Filing Date:
April 15, 2005
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
H01L23/12; H01L21/60; H01L21/78; H01L23/31; H01L23/48; H01L23/485; H01L27/146; H01L31/0203; H01L31/0232; H04N5/225
Domestic Patent References:
| JP2001223288A | ||||
| JP10050915A | ||||
| JP2000208547A | ||||
| JP2002313696A | ||||
| JP2000156429A | ||||
| JP2000106380A | ||||
| JP9082850A | ||||
| JP2002280744A |
Attorney, Agent or Firm:
Katsuhiko Sudo