Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5076429
Kind Code:
B2
Abstract:
A semiconductor device fabrication method that improves the efficiency of semiconductor device production. A plurality of wafer substrates are set and a process for fabricating semiconductor devices each having a ferroelectric capacitor is begun. After ferroelectric layers are formed over the plurality of wafer substrates, the ferroelectric layers formed are damaged. The plurality of wafer substrates are then rearranged and treatment is performed. In each step in which the ferroelectric layers formed may be damaged, the plurality of wafer substrates are rearranged and treatment is performed. As a result, retention characteristic variations among wafer substrates in the same lot are reduced and the productivity of semiconductor devices is improved.
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Inventors:
Koichi Nagai
Application Number:
JP2006270708A
Publication Date:
November 21, 2012
Filing Date:
October 02, 2006
Export Citation:
Assignee:
Fujitsu Semiconductor Limited
International Classes:
H01L21/8246; H01L21/02; H01L21/3205; H01L21/768; H01L23/522; H01L27/105
Domestic Patent References:
| JP2003158128A | ||||
| JP2005100659A | ||||
| JP2004087807A |
Attorney, Agent or Firm:
Takeshi Hattori