Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP5141227
Kind Code:
B2
Abstract:
The invention offers a method of producing a semiconductor device that can suppress the worsening of the property due to surface roughening of a wafer by sufficiently suppressing the surface roughening of the wafer in the heat treatment step and a semiconductor device in which the worsening of the property caused by the surface roughening is suppressed. The method of producing a MOSFET as a semiconductor device is provided with a step of preparing a wafer 3 made of silicon carbide and an activation annealing step that performs activation annealing by heating the wafer 3. In the activation annealing step, the wafer 3 is heated in an atmosphere containing a vapor of silicon carbide generated from the SiC piece 61, which is a generating source other than the wafer 3.
Inventors:
Kazuhiro Fujikawa
Makoto Harada
Yasuo Namagawa
Takeyoshi Masuda
Makoto Harada
Yasuo Namagawa
Takeyoshi Masuda
Application Number:
JP2007320951A
Publication Date:
February 13, 2013
Filing Date:
December 12, 2007
Export Citation:
Assignee:
Sumitomo Electric Industries, Ltd.
International Classes:
H01L21/265; H01L21/28; H01L21/324; H01L21/336; H01L29/12; H01L29/417; H01L29/423; H01L29/49; H01L29/78
Domestic Patent References:
| JP11274481A | ||||
| JP2005353771A | ||||
| JP2006339396A | ||||
| JP11087257A | ||||
| JP2004297034A | ||||
| JP2007281005A | ||||
| JP9502303A | ||||
| JP9502303A |
Other References:
Tomoaki Furusho et al.,Effect of Tantalum in Crystal of Silicon Carbide by Sublimation Close Space Technique,The Japan Society of Applied Physics,2001年,vol 40,6737-6740
Attorney, Agent or Firm:
Kuro Fukami
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Nobuo Arakawa
Toshio Morita
Yoshihei Nakamura
Yutaka Horii
Hisato Noda
Masayuki Sakai
Nobuo Arakawa