Title:
半導体装置の製造方法
Document Type and Number:
Japanese Patent JP6736902
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method capable of preventing yield deterioration caused by formation of a junction electrode by plating.SOLUTION: A semiconductor device manufacturing method comprises: a step of forming impurity layers 20, 22, 24 on a top face side of a semiconductor substrate 10; a step of forming an insulation film 30 having an opening on the top face of the semiconductor substrate; a step of forming by a CVD method, plug metal 34 which covers the insulation film by having plugging metal 34A which plugs the opening of the insulation film and protection metal 34B which links to the plugging metal and is located on the insulation film; a step of forming an extraction electrode 36 on the plug metal by sputtering or a PVD method; and a step of forming on the extraction electrode, a plating layer 38 having a junction electrode 39 by a plating method.SELECTED DRAWING: Figure 1
Inventors:
Shinya Akao
Application Number:
JP2016024804A
Publication Date:
August 05, 2020
Filing Date:
February 12, 2016
Export Citation:
Assignee:
Mitsubishi Electric Corporation
International Classes:
H01L21/28; H01L21/336; H01L29/739; H01L29/78
Domestic Patent References:
| JP2002158354A | ||||
| JP2013211374A | ||||
| JP2012054294A | ||||
| JP2011171551A | ||||
| JP2010129707A | ||||
| JP2000223493A |
Foreign References:
| CN102201409A |
Attorney, Agent or Firm:
Mamoru Takada
Hideki Takahashi
Yoshimi Kuno
Hideki Takahashi
Yoshimi Kuno