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Title:
薄膜トランジスタの製造方法,液晶表示装置の製造方法,エレクトロルミネッセンス表示装置の製造方法
Document Type and Number:
Japanese Patent JP4006993
Kind Code:
B2
Abstract:

To provide a method for fabricating a thin film transistor exhibiting a good mobility in which a high quality oxide film is formed on a low melting point glass substrate while suppressing contraction thereof and to realize a high performance thin film transistor.

The method for fabricating a thin film transistor having a multilayer structure of a semiconductor thin film, an oxide film and a gate electrode comprises a step for forming a semiconductor thin film of polysilicon on an insulating substrate, and a step for forming an oxide film on the semiconductor thin film, wherein the step for forming an oxide film conducts a step for forming a silicon oxide film on the semiconductor thin film in combination with a first annealing step performing heat treatment in the pressure atmosphere of a gas containing oxygen atoms, and a second annealing step performing a heat treatment in a dry atmosphere is conducted following the first annealing step.

COPYRIGHT: (C)2003,JPO


Inventors:
Kunii Masafumi
Application Number:
JP2001383601A
Publication Date:
November 14, 2007
Filing Date:
December 17, 2001
Export Citation:
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Assignee:
ソニー株式会社
International Classes:
G02F1/1368; H01L21/336; G09F9/00; G09F9/30; G09F9/35; H01L21/316; H01L27/32; H01L29/786
Domestic Patent References:
JP9139499A
JP11111615A
JP1100970A
JP1096960A
JP11067758A
Attorney, Agent or Firm:
Takahisa Sato