Title:
集積回路相互接続の製作システム及び方法
Document Type and Number:
Japanese Patent JP2007511095
Kind Code:
A
Abstract:
A system for processing a conductive surface on a front surface of a wafer to form a metallic interconnect structure is disclosed. The system for processing comprises an electrochemical mechanical processing (ECMPR) module configured to form a substantially planarized conductive layer on the front surface of the wafer, a chamber within the ECMPR module configured to remove conductive material from an edge region of the wafer, a CMP module configured to receive the wafer from the ECMPR module and polish the planarized conductive layer on the surface of the wafer to form the metallic interconnect structure, and a robot configured to transfer the wafer from the ECMPR module to the chemical mechanical polish (CMP) module. In one aspect of the invention, the ECMPR module deposits conductive material on the front surface of the wafer. The ECMPR module removes at least a portion of the conductive layer from the front surface of the wafer. Advantages of the invention include improved control of deposited metal to improve device consistency and yield.
Inventors:
Basol Brent M.
Tally Homayon
Tally Homayon
Application Number:
JP2006539636A
Publication Date:
April 26, 2007
Filing Date:
November 03, 2004
Export Citation:
Assignee:
AS M NATUR ink.
International Classes:
H01L21/3205; B02C1/00; B07B9/00; B23H5/08; B24B7/00; H01L21/00; H01L21/02; H01L21/304; H01L21/687; H01L21/768
Attorney, Agent or Firm:
Eiji Saegusa
Kakehi Yuro
Kimio Matsumoto
Kakehi Yuro
Kimio Matsumoto